LLM Hardware/Verilog Design Developer

client in excellent opportunityAnywhere22 days agoFull-time and Temp work
$
₹3.4M–₹5M a year
Compensation
Develop, configure, and customize the hardware design platform, utilizing it to generate vital training data for enterprise LLMs. Liaise with research teams to translate requirements into actionable data insights, directly impacting our LLMs' performance. Uphold the highest standards in coding, debugging, and documentation, ensuring the hardware design solutions are optimized for LLM training and benchmarking. Collaborate across teams to identify and prioritize needs, contributing to the LLMs' ability to understand and automate complex processes. BS or MS degree in Electrical, Engineering, or related field. 3-5 years of proven experience in hardware design development. Expertise in HDLs such as Verilog, SystemVerilog, VHDL, and SystemC. Expertise in scripting, front-end and verification workflows, and integrations within the hardware design environment. Exceptional problem-solving, communication, and collaborative skills. Familiarity with Synopsys/Cadence or open source... toolchains BS or MS degree in Electrical, Engineering, or related field. Over all - 5years of exp. Min of 2 years of relevant experience in Hardware Design and/or Hardware Verification Experience with one or more on the list below: ->ASIC ->VLSI ->FPGA ->SOC Experience with one or more on the list below ->SystemVerilog development ->Verilog development ->Testbench development and/or verification. Good communication skills in English. Type: Full time contract(8 hrs/day) Project timing: UTC-8:00 America/Los_Angeles Overlap Hours: 4 hrs/day with PST Notice period:2weeks Job Type: Full-time Pay: ₹3,400,000.00 - ₹5,000,000.00 per year Application Question(s): • How many years of experience do you have in Hardware Design Development or hardware verification? • Do you have experience with HDLs and scripts? • Have you utilized any open-source LLM (Large Language Models) for convenience in your daily workflows? • Are you ready to work on a contract duration of 6months? • What is the Notice Period of the candidate? • Do you have experience in HDLs such as Verilog, SystemVerilog, VHDL, and SystemC? • Please rate the candidate's communication skills on a scale of 1 to 5, 5 being the highest? Work Location: Remote

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